End Of Life Announced (December 22, 2023) – please contact Mark Lunsford (mlunsford@perasoinc.com) for details. These memories can increase the performance of FPGA based systems and reduced the time to design new systems and shorten time to revenue. Today, system memory strategy involves the tradeoffs of DRAM, HBM, FPGA memory and the growing need for FPGA attached memories. Peraso’s Quazar and Blazar Families of Accelerator Memories attached to Intel, Xilinx and Achronix FPGAs​.

These devices are low cost, high capacity and high-performance FPGA attached memories perfect for QDR replacement and easy-to-design new systems.

The Peraso Quazar Family

Quazar family is a low cost, high capacity, and high bandwidth random-access SRAM. The QPR4 has 567Mb of memory and the QPR8 has 1.1Gb of memory in a singe IC. Best for buffer, temporary data and working data tables, industrial control, test and measurement system.

Feature List

  • Low Cost
    • Costs significantly less than the equivalent of a QDR configuration
  • High-Capacity single device
    • 576Mb (equivalent to 4 QDR)
      • Looks to FPGA as 4, independent SRAM devices
    • 1.1Gb (equivalent to 8 QDR)
      • Looks to FPGA as 8 independent SRAM devices
  • tRC​ as low as 2.67ns
  • Up to 640Gb bandwidth
    • Read, Write, simultaneous Read/Write
  • Simple FPGA SerDes interface using from 4 to16 Serdes lanes
  • Can be used as a Dual Port memory between two FPGAs

 

CLICK HERE to Learn More

The Peraso Blazar Family

Blazar family has all the features of the Quazar device. Additional capability of useful embedded In-Memory functions that execute much faster in-memory than could be executed outside of the memory saving FPGA resources, and therefore increasing functionally and performance. Target market are network infrastructure NICs, network boards, high speed DAC systems, and high speed (such as 5G) test and measurement systems.

Feature List

  • All the features of the Quazar devices
  • Adds powerful In memory functions into the memory
    • BURST – sequential commands to multiple Read, Write or Read/Write
    • RMW – commands for internal executed Read/Modify/Write
      • Such as Increment, Compare and many others
  • High-Capacity single device
    • 576Mb (equivalent to 4 QDR)
      • Looks to FPGA as 4, independent SRAM devices
    • 1.1Gb (equivalent to 8 QDR)
      • Looks to FPGA as 8 independent SRAM devices
  • tRC​ as low as 2.67ns
  • Up to 640Gb bandwidth
    • Read, Write, simultaneous Read/Write
  • Simple FPGA SerDes interface using from 4 to16 Serdes lanes
  • Can be used as a Dual Port memory between two FPGAs

 

CLICK HERE to Learn More